1. Field of the Invention
The present invention relates to a semiconductor wafer with an epitaxial coating on a front surface which has a reduced number of localized light scatterers on the epitaxial layer, and to a cost-effective process for producing it. Semiconductor wafers of this type are suitable for use in the semiconductor industry, in particular for the fabrication of electronic components with line widths of less than or equal to 0.18 μm.
2. The Prior Art
A semiconductor wafer which is intended to be suitable in particular for the fabrication of electronic components with line widths of less than or equal to 0.18 μm must have a large number of special properties. Two particularly important properties of semiconductor wafers are the number of localized light scatterers (LLS) and the roughness (haze) on the surface on which semiconductor components are to be produced. When they are present in a certain number and size, LLS can lead to the failure of the components.
Monocrystalline semiconductor wafers with a layer of the same crystal orientation grown as a single crystal is a so-called epitaxial or epitaxially grown layer, on which semiconductor components are applied. For example a silicon wafer with a silicon layer, have certain advantages over semiconductor wafers made of a homogeneous material. Mention may first be made of the so-called latch-up problem, which can occur for example in CMOS circuits on homogeneous material and may lead to voltages in the transistors which may permit charge reversal and effect a short circuit of the component in question. A person skilled in the art is aware that this latch-up problem can be effectively prevented by the use of an epitaxially coated semiconductor wafer made of a heavily doped substrate wafer (low electrical resistance) and a weakly doped epitaxial layer (high resistance). This simultaneously brings about a desired gettering effect of the substrate and, moreover, reduces the area occupied by the component. Furthermore, in comparison with polished semiconductor wafers, epitaxially coated surfaces have a lower defect density, expressed as LLS, which may be so-called COPs (crystal-originated particles), for example, which generally leads to a higher yield of intact semiconductor components. Furthermore, epitaxial layers have no appreciable oxygen content, which precludes the risk of oxygen precipitates that potentially destroy circuits in regions relevant to components.
According to the prior art, epitaxially coated semiconductor wafers are produced from suitable intermediates by the process sequence of abrasive polishing—final polishing—cleaning—epitaxy. In this case, depending on the process control, the surface roughness is approximately 0.5 to 3 nm RMS (root mean square) after the stock removal polishing, measured by the atomic force microscope method (AFM) in a region of 1 μm×1 μm, and approximately 0.05 to 0.2 nm RMS after the final polishing. Three- or four-stage polishing processes in which the roughness is progressively reduced are likewise known.
The patent application EP 684 634 A2 describes a variant procedure in which, in the material-removing polishing step, two different polishing fluids of different grain size are supplied one after the other before the semiconductor wafers are subjected to a final polishing step. Multistage polishing processes have the disadvantage that the production costs of the semiconductor wafers rise with each additional step.
The patent application EP 711 854 A1 describes a process for producing an epitaxially coated wafer by subjecting a sawn-lapped-etched silicon wafer to a stock removal polishing step in which a surface roughness of 0.3 to 1.2 nm RMS (AFM, 1 μm×1 μm) is established. Then in order to reduce the costs, an epitaxial silicon layer is deposited without a smoothing final polishing step being carried out. Although the epitaxial layer thus produced is comparable in its electrical properties to an epitaxial layer produced conventionally with the prior application of a final polishing step, there is the following result. The increase in localized light scatters on the epitaxially coated surface caused by the relatively high initial roughness nonetheless potentially leads to increased failure of components produced on these wafers.